FPGA Verification Engineer @ Resquant
. Proficiency in VHDL, Verilog, or SystemVerilog for RTL verification. Knowledge of the ASIC design process. Experience with VUnit... reusable, modular testbenches using VHDL, Verilog, and SystemVerilog. Building simulation environments to verify complex FPGA...
FPGA Design Engineer @ Resquant
) or 8+ years for Senior-level of hands-on experience in FPGA design and development. Proficient in any VHDL/Verilog.... Proficient in any VHDL/Verilog/SystemVerilog for RTL design. Knowledge of ASIC design process. Experience with timing analysis...
Resquant ⚡ ⚡ Tue, 30 Jun 2026 22:28:57 GMT