and electronics teams Design, write, and verify HDL code (Verilog/SystemVerilog/VHDL) Develop register maps and supporting... and verification Strong RTL development skills (Verilog/SystemVerilog/VHDL) Solid understanding of FPGA design principles (CDC, STA...
Senex Recruitment ⚡⚡ Wed, 25 Mar 2026 23:00:22 GMT
Digital Electronics Engineer
and electronics teams Design, write, and verify HDL code (Verilog/SystemVerilog/VHDL) Develop register maps and supporting... and verification Strong RTL development skills (Verilog/SystemVerilog/VHDL) Solid understanding of FPGA design principles (CDC, STA...
Senex Recruitment ⚡ ⚡ Wed, 25 Mar 2026 23:00:22 GMT