algorithms and standards (Ethernet, TCP/IP, AXI) to hardware and architecture/system design tradeoffs. Proficient in VHDL design...) with Vivado, Embedded SW C++ (OOP) and System Verilog Assertions (SVA). Knowledge of high-speed protocols (PCIe, TCP/IP, Ethernet...
. Develop architecture for implementation of high throughput complex designs involving Cryptographic Algorithms (VHDL) with high... simulation on UVM framework, with System Verilog Assertions, and writing/debugging C++ based SW driven validation on SOC...
Senior Digital Design Engineer
and Vitis. Expertise in VHDL and/or Verilog. Experience developing MCU and SoC software in Rust or C/C++. Working knowledge...
Umbra ⚡ ⚡ Fri, 12 Dec 2025 23:33:43 GMT